Which of the following statements is not true? i. Pipelining takes advantage of instruction level parallelism. ii. Page faults are handled by the operating system. iii. For a virtual memory system with 48-bit virtual addresses, a single page table and 4 KB physical page size, the width of the virtual page number portion of an address is 34 bits. iv. A CPU with a faster clock frequency always has higher performance than one with a slower clock.